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Special Talk
Prof. Jin Jang Silvaco Technical Advisor

TFT Backplane Technologies for Foldable Displays

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Foldable and rollable displays are of increasing interest recently. I will discuss the key technologies of TFTs for those applications. Non-laser detach technology was developed by using a CNTGO buffer layer inserted on carrier glass and then PI substrate coated. A CNT/GO buffer layer helps easy detach and more self-standing of plastic substrate . We made oxide and LTPS TFTs on PI substrate using CNTGO buffer layer and investigated the effect of bending and folding on the electrical properties of TFTs. Tensile stress is found to give more change to the TFT performance for both LTPS and oxide TFTs compared to compressive stress. These results are related with out-folding or in-folding of smartphone displays. The split of both source/drain and semiconductor layer is important for more foldable TFTs. The device performance is also improved a lot by splitting active-layer for oxide TFTs. The TFT in neutral plane is also very robust under bending. I will discuss the strain effect on TFTs with out-folding or in-folding. The effect of grain boundaries on the foldability will be also touched.

IDW '20 Best Paper Award
Dr. Katsumi Abe TCAD AE, Silvaco Japan

AMD1-2 "Simulation Study of Dual-Gate Amorphous Oxide Semiconductor Thin-Film Transistors"

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Bogdan Tudor Senior Manager, Device Characterization, Silvaco,Inc.

Silvaco Modeling for Display Technologies

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Brief review of the Silvaco Modeling capabilities. Introducing the Quick-start Templates for TFT Device Modeling. Reviewing Modeling Solutions for OLED.

Takeshi Kuwagaki APAC FAE manager, Silvaco Japan

Advanced Parasitic Extraction for FPD Pixel Design

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Clever, advanced 3D/phisical-based parasitic extractor fills several requirements for FPD pixcel design, such as very high accuracy, ease-of-use by its execution dashboard, and robustness with complex non-planer interconnect structure. In this presentation, we will discuss what is required for FPD pixel design, and why Clever is the best fit on this purpose.

Yoshihiko Yamamoto Simulation Senior AE, Silvaco Japan

シグナル・インテグリティ解析ソリューション - フィールドソルバを用いた伝送線路のモデル化手法 (日本語)

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Limited for IDW
LC Verilog-A model

Applied voltage and time dependent capacitance model that can also provide information on optical characteristics.

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Limited for IDW
TCAD Simulation Overviews for Display

This pdf shows examples of Silvaco TCAD tools in display technology. You can find that our tools are available for understanding of device operation, clarification of material and structure effects, device design, and failure analysis.

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