The full text for most of these papers may be found at the IEEE website at www.ieee.org .
Cristina Miccoli, Ferdinando Iucolano
"Study of oxide trapping in SiC MOSFETs by means of TCAD simulations,"
Materials Science in Semiconductor Processing, Volume 97, July 2019, pp. 40-43
Dondee Navarro1,2, Akihiro Tone1, Hideyuki Kikuchihara1, Yoji Morikawa2 and Mitiko Miura-Mattausch1
" Enhanced Miller plateau characteristics of a 4H-SiC insulated-gate bipolar transistor in the presence of interface traps ,"
Japanese Journal of Applied Physics, Volume 56, Number 4S, March 2017.
Man Hoi Wong1, Yoji Morikawa2, Kohei Sasaki3,1, Akito Kuramata3, Shigenobu Yamakoshi3, and Masataka Higashiwaki1
" Characterization of channel temperature in Ga2O3 metal-oxide-semiconductor field-effect transistors by electrical measurements and thermal modeling ,"
Applied Physics Letters, Volume 109, Issue 19 (2016)
Dondee Navarro1, Akihiro Tone2, Hideyuki Kikuchihara2, Yoji Morikawa1, and Mitiko Miura-Mattausch2,
"Analysis of 4H-SiC IGBT Switching in the Presence of Interface Traps using Miller Plateau Characteristics,"
International Conference on Solid State Devices and Materials (SSDM) 2016 Proceedings , pp. 245-246.
Copyright 2016 The Japan Society of Applied Physics
Dondee Navarro1, Iliya Pesic1, Yoji Morikawa1, Yoshiharu Furui1, and Mitiko Miura-Mattausch2,
"Investigation of 4H-SiC IGBT Turn-off Performance for Achieving Low Power Loss,"
Japanese Journal of Applied Physics (JJAP) Paper
Japanese Journal of Applied Physics, Vol. 55, 4S, 04ER12, March 2016.
International Conference on Solid State Devices and Materials (SSDM) 2015 Proceedings , pp. 502-503.
Copyright 2015 The Japan Society of Applied Physics
SSDM 2015 Poster
Dondee Navarro, Yoji Morikawa, Masato Fujinaga and Yoshiharu Furui,
"4H-SiC IGBT Electrical Degradation Characteristics Due to Interface Defects,"
Proceedings of the 12th International Workshop on Compact Modeling (IWCM) 2016, pp. 53-56.
Iliya Pesic1,2, Dondee Navarro2, Masato Fujinaga2, Yoshiharu Furui2, and Mitiko Miura-Mattausch1,
"Switching Characteristics of a 4H-SiC IGBT with Interface Defects Up to the Nonquasi-Static Regime,"
Japanese Journal of Applied Physics (JJAP) Paper
Japanese Journal of Applied Physics, Vol. 54, 4S, 04DP11, March 2015.
International Conference on Solid State Devices and Materials (SSDM) 2014 Proceedings , pp. 376-377.
Copyright 2014 The Japan Society of Applied Physics
SSDM 2014 Poster
Lei Yong(雷勇)1; 2, Shi Hongbiao(石宏彪)1, Lu Hai(陆海)1, Chen Dunjun(陈敦军)1, Zhang Rong(张荣)1, and Zheng Youdou(郑有炓)1,
" Field plate engineering for GaN-based Schottky barrier diodes ,"
Ying Wang, Hai-fan Hu, Cheng-hao Yu, and Hao Lan,
" High-Performance Split-Gate Enhanced UMOSFET With p-Pillar Structure ,"
IEEE ELECTRON DEVICE LETTERS
Marco Silvestri, Michael J. Uren, and Martin Kuball,
" Iron-induced deep-level acceptor center in GaN/AlGaN high electron mobility transistors: Energy level and cross section ,"
Center for Device Thermography and Reliability (CDTR), H.H. Wills Physics Laboratory, University of Bristol, BS8 1TL Bristol, United Kingdom
Masataka Miyake1, Fumiya Ueno2, Dondee Navarro3, and Mitiko Miura-Mattausch2,
" Compact Modeling of the Punch-Through Effect in SiC-IGBT for 6.6kV Switching Operation with Improved Performance ,"
1HiSIM Research Center, Hiroshima University, Higashihiroshima, Hiroshima 739–8530, Japan
2Grad. Sch. of Advanced Sciences of Matter, Hiroshima Univ., Higashihiroshima, 739–8530, Japan
3Silvaco Japan Co., Ltd., Yokohama, Kanagawa 244–0801, Japan
Silicon Carbide and Related Materials (ECSCRM) 2012, Saint Petersburg, Russia
Ming Qiao, Xi Hu, Hengjuan Wen, Meng Wang, Bo Luo, Xiaorong Luo, Zhuo Wang, Bo Zhang and Zhaoji Li,
" A Novel Substrate-Assisted RESURF Technology for Small Curvature Radius Junction ,"
Proceedings of the 23rd International Symposium on Power Semiconductor Devices & IC's May 23-26, 2011.
Dr Ivan Pesic,
" Integrated Simulation Solution for Advanced Power Devices "
8th International Workshop on Compact modeling, January 25, 2011 Yokohama Japan
C. Ronsisvalle, V. Enea, C. Abbate, G. Busatto, F. Iannuzzo, A. Sanseverino, G. A. P. Cirrone,
" Effects of back-side He irradiation on MOS-GTO performances ,"
C. Ronsisvalle, V. Enea, C. Abbate, G. Busatto, A. Sanseverino,
" Perspective performances of MOS_Gated GTO in High-Power Applications ,"
Trans. On Electron Dev., Vol. 57, Issue 9, September 2010, pp. 2339-2343.
Ying Wang, Chao Cheng, Hai-fan Hu,
"Investigation of power Trench MOSFETs with retrograde body profile,"
Microelectronics Reliability, In Press, Corrected Proof, Available online 19 September 2010.
M. A. Belaïd, K. Daoud,
"Evaluation of hot-electron effects on critical parameter drifts in power RF LDMOS transistors,"
Microelectronics Reliability, Vol. 50, Issues 9-11, September-November 2010, pp. 1763-1767.
G. Busatto, G. Currò, F. Iannuzzo, A. Porzio, A. Sanseverino, F. Velardi,
"Experimental study and numerical investigation on the formation of single event gate damages induced on medium voltage power MOSFET,"
Microelectronics Reliability, Vol. 50, Issues 9-11, September-November 2010, pp. 1842-1847.
Nebojsa Jankovic, Petar Igic, Naoki Sakurai,
"Compact model of the IGBTs with localized lifetime control dedicated to power circuit simulations,"
Solid-State Electronics, Vol. 54, Issue 3, March 2010, pp. 268-274.
G. E. Vineyard,
"Investigating the Electrothermal Characteristics of a Gate Turn Off Thyristor During Turn-Off Using SILVACO ATLAS(TM),"
Naval Postgraduate School, Monterey, CA., Jun 2009, pp. 149.
R. S. Saxena and M. Jagadesh Kumar,
"A New Buried-Oxide-In-Drift-Region Trench MOSFET With Improved Breakdown Voltage,"
IEEE Electron Device Letters. Manuscript revised June 23, 2009. Accepted for inclusion in a future issue of this journal.
R. S. Saxena and M. Jagadesh Kumar,
"A Stepped Oxide Hetero-Material Gate Trench Power MOSFET for Improved Performance,"
IEEE Trans Electron Devices, Vol. 56, No. 6, June 2009, pp. 1355-1359.
O. Bengtsson, L. Vestling, J. Olsson,
"A computational load-pull method with harmonic loading for high-efficiency investigations,"
Solid-State Electronics, Vol. 53, Issue 1, January 2009, pp. 86-94.
Fortunato Pezzimenti, Francesco G. Della Corte, Roberta Nipoti,
"Experimental characterization and numerical analysis of the 4H-SiC p–i–n diodes static and transient behaviour,"
Microelectronics Journal, Vol. 39, Issue 12, December 2008, pp. 1594-1599.
L. C. Yu, K. Sheng, J. H. Zhao,
"Modeling and design of a monolithically integrated power converter on SiC,"
Solid-State Electronics, Vol. 52, Issue 10, October 2008, pp. 1625-1630.
Yu. P. Snitovsky, V. V. Nelayev, V. A. Efremov,
"New approach to the manufacturing of power microwave bipolar transistors: A computer simulation,"
Russian Microelectronics, Vol. 36, No. 6, Nov. 2007, pp. 409-414.
Hua Ye, Changwoo Lee, James Raynolds, Pradeep Haldar, Michael J. Hennessy and Eduard K. Mueller,
"Silicon power MOSFET at low temperatures: A two-dimensional computer simulation study"
Cryogenics, Vol. 47, Issue 4, April 2007, pp. 243-251.
Nebojsa Jankovic, Tatjana Pesic and Petar Igic,
"All injection level power PiN diode model including temperature dependence,"
Solid-State Electronics, Vol. 51, Issue 5, May 2007, pp. 719-725.
Guo Liang-Liang, Feng Qian, Hao Yue, Yang Yan,
"Study of high breakdown-voltage AIGaN/GaN FP-HEMT,"
Acta Physica Sinica, Vol. 56, No. 5, May 2007, pp. 2895-2899.
M. Alwan, B. Beydoun, K. Ketata and M. Zoaeter,
"Bias temperature instability from gate charge characteristics investigations in N-Channel Power MOSFET,"
Microelectronics Journal, Vol. 38, Issues 6-7, June-July 2007, pp. 727-734.
M. Alwan, B. Beydoun, K. Ketata and M. Zoaeter,
"Gate charge behaviors in N-channel power VDMOSFETs during HEF and PBT stresses,"
Microelectronics Reliability, Vol. 47, Issues 9-11, September-November 2007, pp. 1406-1410.
J. Vobecký and P. Hazdra,
"Dynamic avalanche in diodes with local lifetime control by means of palladium,"
Microelectronics Journal, In Press, Corrected Proof, Available online 21 December 2007.
Tintori O., Munteanu D., Loussier X., Autran J. L., Regnier A., Bouchakour R,
"Compact modeling and performance analysis of Double-Gate MOSFET-based circuits,"
NSTI Nanotechnology Conference and Trade Show - NSTI Nanotech 2006 Technical Proceedings 3, pp. 812-815.
M. A. Belaïd, K. Ketata, K. Mourgues, M. Gares, M. Masmoudi and J. Marcon,
"Reliability study of power RF LDMOS device under thermal stress"
10 October 2006 Microelectronics Journal 38 (2 SPEC. ISS.), pp. 164-170.
M. Garesa, H. Maananea, M. Masmoudia, P. Bertramb, J. Marcona, M. A. Belaid, K. Mourguesa, C. Tolantb and P. Eudeline,
"Hot carrier reliability of RF N- LDMOS for S Band radar application"
Microelectronics Reliability 46 (9-11), pp.1806-1811 September-November 2006.
C. L. Zhang, K. S. Jeon, C. H. Ahn, J. D. Park, E. D. Kim, Na Zhi, Yong Gao,
"Integrated IC-like Thyristor—based Switching Structure for Pulse Current Generation to Electronic Ignition,"
Power Electronics and Motion Control Conference, 2006. IPEMC 2006. CES/IEEE 5th International Volume 2, 14-16 Aug. 2006 pp. 1 - 4.
M. A. Belaid, K. Ketata, M. Gares, J. Marcon, K. Mourgues, M. Masmoudi,
"2-D simulation and analysis of temperature effects on electrical parameters degradation of power RF LDMOS device,"
Nuclear Instruments & Methods in Physics Research, Section B (Beam Interactions with Materials and Atoms), Vol. 253, No. 1-2, Dec. 2006, pp. 250-254.
K. S. Kelkar, N. E. Islam, C. M. Fessler, W. C. Nunnally,
"Investigation of Optically Initiated Avalanche Silicon Carbide High Power Switches,"
Conference Record of the Power Modulator Symposium, 2006. May 2006, pp. 252 - 255.
C. L. Zhang, K. S. Jeon, C. H. Ahn, J. D. Park, E. D. Kim, Na Zhi, Yong Gao,
"Integrated IC-like Thyristory based Switching Structure for Pulse Current Generation to Electronic Ignition,"
Power Electronics and Motion Control Conference, 2006. IPEMC '06. CES/IEEE 5th International Vol. 2, 14-16 Aug. 2006, pp. 1198-201.
A. Karabegovic, R. M. O'Connell,
"Photoswitch-Controlled Class E RF Power Amplifier,"
Conference Record of the Power Modulator Symposium, 2006. 2006 Twenty-Seventh International. 14-18 May 2006, pp. 150 - 152.
De Orio, R. L. Swart, J. W, Marzano, W,
"Design and simulation of a thyristor surge protective device for telecommunication systems"
ECS Transactions Vol. 4, Issue 1, 2006, pp. 319-326.
Z. Wang, A. T. Bryant, J. Wu, P. R. Palmer,
"Implementation and Comparison of Power Diode Models for System Simulation,"
International Conference on Power Electronics and Drives Systems, 2005. PEDS 2005. Vol. 1, Jan. 16-18, 2006, pp. 694 - 699.
P. Bhatnagar, A. B. Horsfall, N. G. Wright, C. M. Johnson, K. V. Vassilevski, A. G. O´Neill,
"Optimisation of a 4H-SiC enhancement mode power JFET for high temperature operation"
Solid-State Electronics, Vol. 49, Issue 3, March 2005, pp. 453-458.
K. S. Kelkar, N. E. Islam, C. M. Fessler, W. C. Nunnally
"Silicon carbide photoconductive switch for high-power, linear-mode operations through sub-band-gap triggering"
Journal of Applied Physics, Vol. 98, Issue 9, 1 November 2005, pp. 1-6.
R. K. Burra, S. K. Mazumder, R. Huang,
"DV/DT related spurious gate turn-on of bidirectional switches in a high-frequency cycloconverter"
IEEE Transactions on Power Electronics, Vol. 20, Issue 6, November 2005, pp. 1237-1243.
G. M. Buiatti, F. Cappelluti, G. Ghione,
"Finite Difference Based Power Diodes Simulation Within SPICE: Modeling Approach and Validation,"
Power Electronics Specialists Conference, 2005. PESC '05. IEEE 36th 2005, pp. 999 - 1003.
M. J. Kumar, V. Parihar,
"Enhanced current gain in SiC power BJTs using a novel surface accumulation layer transistor concept"
Microelectronic Engineering, Vol. 81, Issue 1, July 2005, pp. 90-95.
B. Davenport and S. Michael,
"Advanced thermophotovoltaic cells modeling, optimized for use in radioisotope thermoelectric generators (RTGs) for Mars and deep space missions"
A Collection of the 22nd AIAA International Communications Satellite Systems Conference and Exhibit, 2004.
R. L. Thomas, M. Morgenstern, S. B. Bayne,
"Silvaco modeling of a 10 kV SiC p-i-n diode"
Proceedings of the 26th International Power Modulator Symposium and 2004 High Voltage Workshop.
J. Ankarcrona, K. -H Eklund, L. Vestling, J. Olsson,
"Simulation and modeling of the substrate contribution to the output resistance for RF-LDMOS power transistors"
Solid-State Electronics, Vol. 48, Issue 5, May 2004, pp. 789-797.
M. Vellvehi, D. Flores, X. Jorda, S. Hidalgo, J. Rebollo, L. Coulbeck and P. Waind,
"Design considerations for 6.5 kV IGBT devices"
Microelectronics Journal, Vol. 35, Mar. 2004, pp. 269-275.
H.-C. Cheng, F. -L. Chang, M. -J. Lin, C. -C. Tsai, C. W. Liaw,
"Novel low-temperature polycrystalline-silicon power devices with very-low on-resistance using excimer laser-crystallization"
Journal of the Electrochemical Society, Vol. 151, Issue 12, 2004.
C. -L. Wang, M. -H. Lai, S. -R. Huang, C. -Y. Yeh
"Design of optimum the insulator Design of optimum the insulator gate bipolar transistor using response surface method with cluster analysis"
Jpn. J. Appl. Phys. Vol. 43, 2004, Part 1: Regular Papers and Short Notes and Review Papers.
S. Musumeci, R. Pagano, A. Raciti, G. Belverde, A. Magrì, M. Melito, F. Zara,
"New packaging concepts and physics-based simulation approach for low-voltage power MOSFETs lead to performance improvement in advanced DC-DC converters"
PESC Record - IEEE Annual Power Electronics Specialists Conference, Vol. 2, 2004, pp. 1531-1537.
S. C. Kim, H. W. Kim, K. S. Seo, C. L. Zhang, E. D. Kim,
"Static and dynamic characteristics of the 2.5kV/500A IGCTs"
Proceedings of the International Conference on Microelectronics, Vol. 24 I, 2004, pp. 171-173.
D. Frey, J. L. Schanen, J.L. Aug, O. Lesaint,
"Electric field investigation in IGBT power modules"
Proceedings of the 2004 IEEE International Conference on Solid Dielectrics ICSD 2004, Vol. 2, pp. 1000-1005.
S. Azzopardi, J. M. Vinassa, E. Woirgard, C. Zardini, J. L. Aucouturier,
"What can be the optimum IGBT structure under UIS operation?"
PESC Record - IEEE Annual Power Electronics Specialists Conference, Vol. 4, 2004, pp. 2999-3003.
P. Hazdra, J. Vobecky, H. Dorschner, K. Brand,
"Axial lifetime control in silicon power diodes by irradiation with protons, alphas, low- and high-energy electrons"
Microelectronics Journal, Vol. 35, Issue 3, March 2004, pp. 249 - 257.
Shuntao Hu and Kuang Sheng,
"A New Edge Termination Technique for SiC Power Devices"
Proceedings of 2003 International Semiconductor Device Research Symposium, Washington DC, December 1, pp. 122-123.
James Fuerherm, Yu Anne Zeng, and Marvin H. White,
"A Study of Interface Charges on the Operation of 4H Silicon Carbide Static (SiC) Static Induction Transistors (SITs)"
Proceedings of 2003 International Semiconductor Device Research Symposium, Washington DC, December 1, pp. 134-135.
S. Azzopardi, E. Woirgard, J. -M. Vinassa, O. Briat, C. Zardini,
"IGBT Power modules thermal characterization: What is the optimum between a low current - High voltage or a high current - Low voltage test condition for the same electrical power?"
Microelectronics Reliability, Vol. 43, Issue 9-11, September 2003, pp. 1901-1906.
Il-Yong Park, et. al.,
"Novel Process Technoques for Fabricating High Density Trench MOSFET with Self-Aligned N+/P+ Source Formed on the Trench Side Wall"
ISPSD´03 Proceedings, pp. 169-172.
Chanho Park et. al.,
"Deep Trench Terminations Using ICP RIE for Ideal Breakdown Voltages"
ISPSD´03 Proceedings, pp. 199-202.
S. Alves et. al.,
"Vertical N-channel FLIMOSFET for Future 12V/42V Dual Batteries Automotive Applications"
ISPSD´03 Proceedings, pp. 308-311.
Timothy Henson and Joe Cao,
"Low Voltage Superjunction MOSFET Simulation and Experiment"
Proc. International Symposium on Power Semiconductor Devices (ISPSD), 2003.
Xiangli Li, Huadian Pan and B. M. Wilamowski,
"Gate-controlled punch through transistor Proceedings of the 15th Biennial University/Government/Industry"
Microelectronics Symposium 2003, 30 Jun-2 Jul 2003, pp. 226-229.
K. Kunihiro, Y. Takahashi, Y. Ohno,
"Physical modeling of off-state breakdown in power GaAs MESFETs"
Solid-State Electronics, Vol. 47, April 2003, pp. 621-631.
J. Vobecky, P. Hazdra, V. Zahlava,
"Impact of the electron, proton and helium irradiation on the forward I-V characteristics of high-power P-i-N diode"
Microelectronics Reliability, Vol. 43, April 2003, pp. 537-544.
R. S. Anand, B. Mazhari and J. Narain,
"A study into the applicability of p+n+ (universal contact) to power semiconductor diodes for faster reverse recovery"
Solid-State Electronics, Vol. 47, Issue 1, Jan. 2003, pp. 83-91.
P. Cova, R. Menozzi and M. Portesine,
"Power p-i-n diodes for snubberless application: H+ irradiation for soft and reliable reverse recovery"
Microelectronics Reliability, Vol. 43, Issue 1, Jan. 2003, pp. 81-87.
K. Kelkar and W. C. Nunnally,
"Semiconductor Modeling for Multi-layer, High Field, Photo-Switch using sub-bandgap Photons"
Digest of Technical Papers-IEEE International Pulsed Power Conference, 2003, pp. 819-822.
"Low Voltage Super Junction MOSFET Simulation and Experimentation" ,
Timothy Henson, Joe CaoInternational Rectifier, 233 Kansas St, El Segundo, CA 90245 USA, Phone +01 310 726 8842, Fax +01 310 726 8847 E-mail: firstname.lastname@example.org
X. Gu, Q. Shui, C. W. Myles, M. A. Gundersen
"Comparison of Si, GaAs, SiC and GaN FET-type switches for pulsed power applications"
Digest of Technical Papers-IEEE International Pulsed Power Conference, 2003, pp. 362-365
K. Shenai, C. Cavallaro, S. Musumeci, R. Pagano, A. Raciti,
"Modeling Low-Voltage Power MOSFETs as Synchronous Rectifiers in Buck Converter Applications"
Conference Record - IAS Annual Meeting (IEEE Industry Applications Society), Vol. 3, 2003.
D. Frey, J. L. Schanen, J. L. Aug, J. L., Lesaint, O.,
"Electric field investigation in high voltage power modules using finite element simulations and partial discharge measurements"
Conference Record - IAS Annual Meeting (IEEE Industry Applications Society), Vol. 2, 2003, pp. 1000-1005.
M. Vellvehi, D. Flores, X. Jord,
"Design and optimisation of suitable edge terminations for 6.5 kV IGBTs"
Microelectronics Journal, Vol. 33, Issue 9, September 2002, pp. 765-769.
K. Shenai, M. Trivedi and P. Neudeck,
"Characterization of Hard- and Soft-Switching Performance of High-Voltage Si and 4H-SiC PiN Diodes"
IEEE Trans. Elect Dev. Sept 2002, pp. 1648-1656.
C. L. Wang,
"Design of Optimum Power Insulated-Gate Bipolar Transistor Using Response Surface Method"
Jpn. J. Appl. Phys., Vol. 41, May 2002, pp. 2864-2872.
C. Tolksdorf, C. Fink, J. Schulze, S. Sedlmaier, W. Hansch, W. Werner, W. Kanert and I. Eisele,
"The vertical concept of power MOSFETs"
Materials Science and Engineering B, Vol. 89, February 2002, pp. 439-443.
J. H. Kim et. al.,
"High Performance Complementary Bipolar Process using PBSOI Technique"
ISPSD´02 Proceedings, pp. 85-88.
Chanho Park et. al.,
"A New Junction Termination Technique Using ICP RIE for Ideal Breakdown Voltages"
ISPSD´02 Proceedings, pp. 257-260.
C. K. Jeon, et. al.,
"Analysis of LDMOS Structure with Inclined P-bottom Region"
ISPSD´02 Proceedings, pp. 293-296.
P. Hazdra, J. Vobecky and K. Brand,
"Optimum lifetime structuring in silicon power diodes by means of various irradiation techniques"
Nucl. Instrum. Meth. B., Vol.186, Jan. 2002, pp. 414-418.
H. Hakim, J. -L. Sanchez, J. -P. Laur, P. Austin, M. Breil,
"The concave junction: An attractive topology to design specific junction terminations"
IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), 2002, pp. 193-196.
A. Raman, D. G. Walker, T. S. Fisher,
"Non-equilibrium thermal effects in power transistors"
American Society of Mechanical Engineers, Heat Transfer Division, (Publication) HTD, Vol. 369, Is.
S. Abedlnpour and K. Shenai,
"Stress analysis of DC-DC power converters"
Proceedings of the Intersociety Energy Conversion Engineering Conference, Vol. 1, 2001, pp. 141.
S. Abedinpour, R. Burra, K. Shenai,
"Two-dimensional finite element simulation and stress analysis of a full bridge DC-DC power converter"
INTELEC, International Telecommunications Energy Conference (Proceedings), 2001, pp. 205-212.
M. J. Urena, D. Leea, B. T. Hughesa et al.,
"Electrical characterization of AlGaN/GaN heterostructure wafers for high-power HFETs"
Journal of Crystal Growth, Vol. 230, 2001, pp. 579 - 583.
C. Fink, J. Schulze, I. Eisele, W. Hansch, W. Werner, W. Kanert,
"Reducing of ROn in vertical Power-MOSFETs due to local channel doping"
Japanese Journal of Applied Physics, 2001, Vol. 40, Issue 4B, pp. 2637.
"High-power robust semiconductor electronics technologies in the new millennium"
Microelectronics Journal, Vol. 32, Issues 5-6, 2001, pp. 397-408.
G. Kamoulakos, Th. Haniotakis, Y. Tsiatouhas, J. -P. Schoellkopf and A. Arapoyanni,
"Device simulation of a n-DMOS cell with trench isolation"
Microelectronics Journal, Vol. 32, Issue 1, January 2001, pp. 75-80.
C. Anghel, N. Hefyene, A. Ionescu, M. Vermandel, B. Bakeroot, J.Doutreloigne, R. Gillon, S. Frere, C. Maier, Y. Mourier,
"Investigations and Physical Modelling of Saturation Effects in Lateral DMOS Transistor Architectures Based on the Concept of Intrinsic Drain Voltage"
ESSDERC 2001. pp. 399-402.
Kim S. L. Jeon C. K. Kim J. J. Choi Y. S. Kim M. H. Kang H. S. Song C. S.,
"A New Compact Isolation Structure in High Side Island Region of 600V HVIC,"
Proc. ESSDERC 2001, pp. 415-418.
Frere S.F. Rhayem J. Adawe H.O. Gillon R. Tack M. Walton A.J.,
"LDMOS Capacitance Analysis versus Gate and Drain Biases, Based on Comparison Between TCAD Simulations and Measurements,"
Proc. ESSDERC 2001, pp. 219-222.
Tsai-Sheng Liao, P. Yu, and O. Zucker,
"Analysis of high pulse power generation using novel excitation of IGBT,"
Proceedings of the IEEE 6th International Conference on Solid-State and Integrated-Circuit Technology, Vol. 1. pp. 143-148.
Q. Zhang and T. S. Sudarshan
"Lateral current spreading in SiC schottky diodes using metal overlap edge termination,"
Solid-State Electronics, Vol. 45, 2001, pp. 1847-1850.
C. K. Jeon, J. J. Kim, Y. S. Choi, M. H. Kim, S. L. Kim, H. S. Kang, C. S. Song,
"800V/1A, 1-chip process for battery charger IC,"
IEEE International Symposium on Power Semiconductor Devices and ICs (ISPSD), 2001, pp. 355-358.
Marc C. Tarplee et al.,
"Design Rules for Field Plate Edge Termination in SiC Schottky Diodes,"
IEEE Trans. Elect. Dev., Vol. 48, No. 12, Dec. 2001, pp. 2659-2664.
Q. Zhang and T. S. Sudarshan,
"Lateral current spreading in SiC Schottky diodes using metal overlap edge termination"
Solid-State Electronics, Vol. 45, Issue 10, October 2001, pp. 1847-1850.
N. L. Rupesinghe, M. Chhowalla, K. B. K. Teo, G. A. J. Amaratunga
"Field emission vacuum power switch using vertically aligned carbon nanotubes"
Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures, 2001, Vol. 21, pp. 3-4.
D. Dragomirescu, G. Charitat,
"Improving the dynamic avalanche breakdown of high voltage planar devices using semi-resistive field plates"
Microelectronics Journal, Vol. 32, May-June 2001, pp. 473-479.
P. D. Hewitt and G. T. Reed,
"Improved modulation performance of a silicon p-i-n device by trench isolation"
Journal of Lightwave Technology, Vol. 19, Issue 3, March 2001, pp. 387-390.
C. J. Hung, P. Roblin, and S. Akhtar,
"Distributed b-spline electrothermal models of thyristors proposed for circuit simulation of power electronics"
IEEE Transactions On Electron Devices, 48(2):353-366, February 2001.
B. You, A. Q. Huang, J. K. O. Sin,
"A 600-V, 10-A trench bipolar junction diode with superior static and dynamic characteristics"
IEEE Transactions on Electron Devices, Vol. 48, Issue 9, September 2001, pp. 2143-2147.
N. Cezac, F. Morancho, P. Rossel, H. Tranduc, A. Peyre-Lavigne
"New generation of power MOSFET based on the concept of `Floating Islands´"
EPJ Applied Physics, Vol. 10, Issue 3, June 2000, pp. 203-209.
K. Shenai, E. McShane, S. K. Leong, (sub T on fT title)
"Lateral RF SOI power MOSFETs with fT of 6.9 GHz"
IEEE Electron Device Letters, Vol. 21, Issue 10, October 2000, pp. 500-502.
K. Shenai and M. Trivedi,
"Silicon carbide power electronics for high temperature applications"
IEEE Aerospace Conference Proceedings, Vol. 5, 2000, pp. 431-437.
E. McShane and K. Shenai,
"Microwave performance of power MOSFETs on SOI substrates"
Proceedings of the IEEE Cornell Conference on Advanced Concepts in High Speed Semiconductor Devices, pp. 148-157.
S. Azzopardi, M. Trivedi, C. Zardini and K. Shenai,
"Non-destructive extraction of technological parameters for numerical simulation of conventional planar punch-through IGBT"
Solid-State Electronics, Vol. 44, Issue 11, 1 November 2000, pp. 1899-1908.
I. M. Gordion, Z. S. Gribnikov, V. A. Korobov and V. V. Mitin,
"Fast gate turn-off in a merged thyristor-like structure"
Solid-State Electronics, Vol. 44, Issue 10, 1 October 2000, pp. 1723-1732.
M. Trivedi and K. Shenai,
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P. D. Hewitt and G. T. Reed,
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E. McShane, Y. Xu, P. Khandelwal, and K. Shenai,
" Low-Power Systems-on-a-Chip CAD "
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